CD4060 belongs to 4000 Series CMOS Logic Family of Integrated Circuits (IC’s) constructed with N- and P-channel enhancement mode transistors. CD4060 has 14-Stage Ripple-Carry Binary Counter
CD4060 has a supply voltage range of 5V to 20V, which is much higher than any contemporary logic family. It has buffered output which improves transfer characteristics by providing very high gain. All inputs are protected against static discharge with diodes to VDD and VSS.
CD4060 Features
- Wide supply voltage range: 1.0V to 15V
- High noise immunity: 0.45 VDD (typ.)
- Low power TTL compatibility: Fan out of 2 driving 74L
- or 1 driving 74LS
- Medium speed operation: 8 MHz typ. at VDD = 10V
- Schmitt trigger clock input
CD4060 Specifications
Absolute Maximum Ratings
- DC Supply Voltage Range, (VDD): -0.5V to +18V
- Input Voltage Range, All Inputs: -0.5V to VDD +0.5V
- Package Dissipation (PD)
- Dual-In-Line 700 mW
- Small Outline 500 mW
- Storage Temperature Range (TSTG): -65oC to +150oC
- Lead Temperature (During Soldering): +260oC
- At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for 10s Maximum
CD4060 Pinout Diagram
CD4060 Pin Description
| Pin No | Pin Name | Description |
| 1 | Q12 | Output 12 of Stage Counter |
| 2 | Q13 | Output 13 of Stage Counter |
| 3 | Q14 | Output 14 of Stage Counter |
| 4 | Q6 | Output 6 of Stage Counter |
| 5 | Q5 | Output 5 of Stage Counter |
| 6 | Q7 | Output 7 of Stage Counter |
| 7 | Q4 | Output 4 of Stage Counter |
| 8 | VSS | Supply Voltage |
| 9 | Φ0 | Clock Signal |
| 10 | Φ0′ | Clock Signal (Active Low) |
| 11 | Φ1 | Clock Signal |
| 12 | RESET | Reset Pin |
| 13 | Q9 | Output 9 of Stage Counter |
| 14 | Q8 | Output 8 of Stage Counter |
| 15 | Q10 | Output 10 of Stage Counter |
| 16 | VDD | Drain Voltage |
CD4060 Circuit
Applications
- Control counters
- Timers
- Time-delay circuits
CD4060 Alternative Equivalent
CD4020, CD4040
Download CD4060 14-Stage Ripple-Carry Binary Counter Datasheet from the link given below.
